In order to create facilities that have the production capability to withstand
sudden changes in demand, or to create machinery that is easily distinguished
from that created by market competitors, a top-speed controller that can deliver
the performance required to support these needs is required. The SYSMAC CS1 PLCs
have been equipped with the highest I/O responsiveness and data control
functionality to significantly reduce processing time and to control machinery
movement with greater precision.
In order to allow easier development of complex programs, in addition to an
integrated Windows-based development environment, the new PLCs are equipped with
a variety of instructions. Structured programming functionality has been
improved to allow programs to be reused with greater efficiency and thereby
reduce labor requirements and cut costs.
The know-how that our customers have accumulated through the years forms the
core of their competitive strength. At OMRON, we believe in enhancing this
know-how to the utmost. The key to doing this is 100% upward compatibility. CS1
PLCs allow existing Units and programs to be used without any changes.
Unit versions have been introduced to control differences in functions featured
by CPU Units that are the result of version upgrades.
The unit version is marked on the nameplates of products subject to version
control, as shown in the diagram.
Use the improved SYSMAC CS1 PLCs to scale advanced systems to the optimum size.
Faster Instruction Execution and Faster Overall Performance
In addition to further improvements to the instruction execution engine, which
is the core of overall PLC performance, the high-speed RISC chip has been
upgraded to realize the fastest instruction execution performance in the
industry. Also, the new models have a mode where instruction execution and
peripheral processing are processed in parallel, enabling balanced improvements
in overall speed.
Common Processing: 1.6 Times Faster
The figures above are for high-speed, general-purpose PLCs with interchangeable
PCMIX Value: 3 Times Higher
The PCMIX is the average number of instructions that can be executed in 1 μs and
expresses the over execution performance of the ladder program. This unit was
conceived to allow comparing the performance of PLCs from different
manufacturers using a common metric.
Cycle Time: 2.5 to 4.8 Times Shorter
(Cycle time for 128 inputs and 128 outputs)
With normal I/O refresh, 1-ms pulses are not lost even for large-capacity (e.g.,
30-Kstep) programs. This allows use in applications requiring a high working
accuracy, such as molding equipment.
LD Instruction Processing Speed: 2 Times Faster
The development of a special LSI to execute instructions and use of a high-speed
RISC chip enable high-speed processing at the CPU.
OUT Instruction Processing Speed: 8 Times Faster
Programs consisting mainly of basic instructions are processed at ultrahigh
Subroutine Processing Speed: 17.6 Times Faster
Cycle time overhead due to program structuring is minimized.
System Bus Baud Rate Doubled
The data transfer rate between the CPU Unit and certain Units has been doubled
to further improve total system performance.
Reduced Variation in Cycle Time During Data Processing
Instructions that require long execution time, such as table data processing
instructions and text string processing instructions, are processed over
multiple cycles to minimize variations in cycle time and maintain stable I/O
Improved Refresh Performance for Data Links, Remote I/O Communications, and
In the past, I/O refresh processing with the CPU Bus Unit only occurred during
I/O refresh after instructions were executed. With the new CS1, however, I/O can
be refreshed immediately by using the DLNK instruction. Immediate refreshing for
processes peculiar to the CPU Bus Unit, such as for data links and DeviceNet
remote I/O communications, and for allocated CIO Area/DM Area words when
instructions are executed, means greater refresh responsiveness for CPU Bus
Large Capacity CPU Units for Greater Component Control Power
The CS1 CPU Units boast amazing capacity with up to 5,120 I/O points, 250 Ksteps
of programming, 448 Kwords of data memory (including expanded data memory) and
4,096 timers/counters each. With a large programming capacity, CS1 PLCs are not
only ideal for large-scale systems but easily handle value-added applications
and other advanced data processing.
Control Up to 960 Points with Units Mounted to the CPU Rack
The CS1 provides a high level of space efficiency. As many as 960 I/O points can
be controlled by simply mounting ten Basic I/O Units, with 96 I/O points each,
to the CPU Rack. Alternatively, as many as 80 analog I/O points can be used by
mounting five Analog Input Units and five Analog Output Units.
Wide Lineup Makes It Easy to Build the Optimum System
A total of nine CPU Unit models provide for a wide range of applications, from
small-scale systems to large. The lineup also includes Memory Cards, Serial
Communications Boards, and a wide selection of Special I/O Units that can be
used with any CPU Units to flexibly build the system that meets the
Two Series of Expansion Racks Up to 50 m Long for Long-distance Expansion with
Up to 72 Units and 7 Racks
With an expansion capacity of up to 80 Units and 7 Racks over a distance of 12
meters, the CS1 can meet large-scale control needs. Alternatively, an I/O
Control Unit and I/O Interface Units can be used to connect two series of CS1
Long-distance Expansion Racks extending up to 50 m each and containing a total of
up to 72 Units and 7 Racks. CS1 Basic I/O Units, CS1 Special I/O Units, and CS1
CPU Bus Units can be mounted anywhere on the Racks and programmed without being
concerned about special remote programming requirements.
Note: C200H Units cannot be mounted on the Long-distance Expansion Racks.
Equipped with functions demanded by the production site to suit a variety of
Nested Interlocks (for CPU Unit Ver. 2.0 or Later)
Although strictly speaking the present interlock instructions do not allow
nesting, applications can be created to include combination of complete and
partial interlock conditions that achieve nested interlocks.
(1) Conveyor operates
(2) Contact "a" turns ON when operator is present and products are supplied.
(3) When the emergency stop button is pressed, the conveyor and product addition
Easy Cam Switch Control with Ladder Instructions (for CPU Unit Ver. 2.0 or
The time interval for execution by the GRY instruction is determined by the
response speed for reading data from the absolute encoder.
Easy Calendar Timer Function
(for CPU Unit Ver. 2.0 or Later)
TIME-PROPORTIONAL OUTPUT (TPO) Instruction
(for CPU Unit Ver. 2.0 or Later)
Convert Between Floating-point Decimal and Character Strings
The new CS1 can convert floating-point decimal (real numbers) to character
strings (ASCII) for display on a PT (operator interface). The data can be
displayed on the PT as a character string display element.
The new CS1 can convert ASCII character strings read from measurement devices by
serial communications to floating-point decimal data for use in data processing.
The new CS1 can autotune PID constants with a PID control instruction.
The limit cycle method is used for autotuning, so the tuning is completed
quickly. This is particularly effective for multiple-loop PID control.
Highly Accurate Positioning with XY Tables
The new CS1 has many double-precision processing instructions for floating-point
decimal operations, enabling positioning with greater accuracy.
Error Status Generation for Debugging
A specified error status can be simulated by executing the diagnostic
instructions (FAL/FALS). With the new CS1, debugging is simple for applications
that display messages on a PT or other display device based on the error status
of the CPU Unit.
Easy Reading of Maintenance Data via DeviceNet
(for CPU Unit Ver. 2.0 or Later)
The addition of special explicit message instructions makes it easy to send
explicit messages without having to consider FINS commands. Transferring data
among PLCs with explicit messages is also simplified.
Simpler Ladder Programs
Ladder programs that use a lot of basic instructions can be simplified using
differentiation instructions LD NOT, AND NOT, and OR NOT, and instructions that
access bits in the DM and EM Areas.
Binary Set Values for Timer/Counter Instructions
The SV for a timer or counter instruction can be specified using either BCD or
binary. Using binary SV enables longer timers and higher-value counters.